1. Field of the Invention
The present invention relates to semiconductor devices, and more specifically to an in-situ deposition and doping process for polycrystalline silicon layers of semiconductor devices.
2. Description of Related Art
Polycrystalline silicon, which is also known as polysilicon or polySi, is an essential material for integrated circuits such as MOS-type circuits because polysilicon can be doped at levels that make it a substantially degenerate semiconductor or metal-like with respect to electric conduction. During manufacturing, polysilicon is usually grown from SiO2 layers so that the resulting material is formed of crystals that are smaller than one micrometer. These small polysilicon crystals are also known as grains. One exemplary application of polysilicon is in the structures of flash-type memory devices.
FIG. 1 shows the structure of a flash memory device during an intermediate processing stage following gate stack definition (i.e., after forming the gate layers and before the re-oxidation process). The gate stack includes a first layer P1 of n+ type polysilicon (e.g., a layer consistently doped at 1020 atoms/cm3) that is deposited over a thin layer of tunnel oxide OT, and a dielectric formed by a sequence of oxide layers OX, such as SiO2, SiN4 and SiO2 again (i.e., ONO), is deposited on the first polysilicon layer P1. On the dielectric layer OX, a second n+ type polysilicon layer P2 is deposited, and then a silicide layer W (e.g., WSi2 or TiSi2) is deposited as required to reduce the series resistance of the gate. The source S and drain D areas of the memory cell, which are located on the sides of the gate stack, are simultaneously diffused during a subsequent re-oxidation process in which a thin SiO2 layer is grown on the sides of the gate stack.
To form the polysilicon gate layers, the current trend is towards using an in-situ doping technique in which a polysilicon layer is both grown and doped at the same time (e.g., by directly introducing phosphorous in the form of phosphine PH3 into the growth mixture). Such in-situ doping is preferred because liquid phase doping from POCl3 is intrinsically “dirty.” In particular, liquid phase doping generates many spurious particles and thus produces a highly defective polysilicon layer. Further, the ionic implantation technique cannot reach the same high doping values and requires extensive use of implantation machines that produce a much finer layer grain that is not always desirable, especially in volatile memory devices.
The problems related to in-situ polysilicon doping are essentially derived from the high doping level to be reached and the considerable grain size. First, in a segregation phenomenon that occurs along the grain edges, the dopant atoms tend to exploit the unsaturated bonds and locate over the microcrystal external surface. The segregation phenomenon can cause excessive localized accumulations of dopant and even some grains to come off the layer so as to cause the layer itself to be defective. Further, in an “out-doping” phenomenon that occurs during the re-oxidation thermal treatment, the high processing temperature causes the polysilicon deposited on the backside of the wafer to release some dopant and contaminate the oxidating gaseous atmosphere so as to extend to the open areas in the front. This can considerably alter the doping of both the active and insulating areas of the device.
One proposed solution to such problems is to use a re-oxidation process in which an oxide layer is deposited over the doped polysilicon after its first growth stage in order to provide a barrier to p-type atom diffusion. However, using such a re-oxidation process has other drawbacks such as an increase in crystallographic defects because the growth of the oxide layer takes place before carrying out an ‘annealing’ treatment of the defects generated during the implantation stage, and a reduced adhesion of the silicide layer to the underlying polysilicon layer. Another proposed solution is to remove a portion of the doped polysilicon from the backside of the wafer before re-oxidation. However, such a technique increases manufacturing costs and generates further defects.